MOTOR-18 — Space Vector PWM (SVPWM)

FACT — In a traction inverter, translating digital FOC voltage demands ($V_\alpha^*, V_\beta^*$) into physical gate pulses requires continuous high-frequency switching. Space Vector Pulse Width Modulation (SVPWM) extracts 15.5% higher fundamental AC voltage from the DC battery bus compared to standard sinusoidal PWM, directly expanding the vehicle’s top speed and power envelope.

In this lesson, we break down the geometry of the inverter voltage hexagon, dwell-time equations, and dead-time compensation in automotive traction:

1. Why SVPWM? (15.5% Higher DC Bus Utilization)
2. The 8 Inverter Switching States & Voltage Hexagon
3. Volt-Second Balance and Sector Dwell Times ($T_1, T_2, T_0$)
4. Symmetric 7-Segment Center-Aligned Modulation
5. Overmodulation Modes and Six-Step Square-Wave Operation
6. Inverter Dead-Time Distortion and Active Compensation

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1. Why SVPWM? (SPWM vs. SVPWM)

In classic Sinusoidal PWM (SPWM), three individual sinusoidal duty cycles are compared against a high-frequency triangular carrier. The maximum linear phase-to-neutral peak voltage is bounded by half the DC rail:

$V_{max,SPWM} = \frac{V_{dc}}{2} = 0.50 \cdot V_{dc}$

However, electric vehicle motor windings are typically star-connected with an isolated neutral. The coils experience line-to-line voltages, not isolated phase-to-ground potentials.

SVPWM treats the three inverter legs holistically as a single resultant voltage vector in the $\alpha-\beta$ plane. This naturally injects a triplen (3rd harmonic) zero-sequence component, flattening the phase voltage peaks and allowing the linear modulation boundary to reach:

$V_{max,SVPWM} = \frac{V_{dc}}{\sqrt{3}} \approx 0.577 \cdot V_{dc}$

$\text{Voltage Gain} = \frac{0.577 - 0.500}{0.500} \times 100 = 15.47\% \approx 15.5\%$

EXAMPLE — In a $400\text{ V}$ battery EV, SPWM caps line-to-neutral peak voltage at $200\text{ V}$. SVPWM boosts usable peak voltage to $231\text{ V}$—granting an extra $31\text{ V}$ of driving headroom before hitting Back-EMF ceilings at high vehicle speeds!

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2. The 8 Switching States & Voltage Hexagon

A standard 3-phase 2-level inverter has 3 half-bridge legs (6 switches). Each leg can connect the motor terminal to either $+V_{dc}$ (state ‘1’) or ground (state ‘0’).

The 8 possible switching states yield:

• 6 Active Vectors ($V_1 - V_6$): Drive non-zero currents through the stator.
• 2 Zero Vectors ($V_0 [000]$ and $V_7 [111]$): Short-circuit all three motor phases to the negative rail ($000$) or positive rail ($111$), resulting in zero net terminal voltage ($|V| = 0$).

Plotted in the $\alpha-\beta$ plane, the 6 active vectors form the vertices of a regular Voltage Hexagon:

SVPWM Voltage Hexagon:
                   beta
                    ^
           V3(010)  |  V2(110)
              \  S2 | S1  /
               \    |    /
         S3     \   |   /     S6
                 \  |  /
    V4(011)-------+---+------- V1(100) ----> alpha
                 /  |  \
         S4     /   |   \     S5
               /    |    \
              /  S5 | S6  \
           V5(001)  |  V6(101)

The active vector amplitudes are:

$|V_{active}| = \frac{2}{3} V_{dc}$

The maximum inscribed circle represents the linear modulation limit:

$R_{linear} = \frac{2}{3} V_{dc} \cos(30^\circ) = \frac{V_{dc}}{\sqrt{3}} \approx 0.577 V_{dc}$

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3. Volt-Second Balance and Dwell Times

Within any $60^\circ$ sector (e.g. Sector 1: $0^\circ \le \theta < 60^\circ$), the target vector $\vec{V}_{ref}$ is synthesized by time-averaging adjacent active vectors and zero vectors across the PWM period $T_s$:

$\vec{V}_{ref} \cdot T_s = \vec{V}_1 \cdot T_1 + \vec{V}_2 \cdot T_2 + \vec{V}_{zero} \cdot T_0$

Where:

• $T_1$: Dwell time of first adjacent active vector
• $T_2$: Dwell time of second adjacent active vector
• $T_0$: Dwell time allocated to zero vectors ($T_0 = T_s - T_1 - T_2$)

Analytical solutions for Sector 1:

$T_1 = \frac{\sqrt{3} \cdot T_s \cdot |\vec{V}_{ref}|}{V_{dc}} \sin(60^\circ - \theta)$

$T_2 = \frac{\sqrt{3} \cdot T_s \cdot |\vec{V}_{ref}|}{V_{dc}} \sin(\theta)$

$T_0 = T_s - T_1 - T_2$

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4. Symmetric 7-Segment Modulation Sequence

To minimize switching power losses and phase harmonic distortion, the dwell times are distributed across the switching cycle such that:

1. Only one inverter phase state changes at each switching event.
2. The PWM waveform is strictly center-aligned and mirror-symmetric.

In Sector 1, the sequence alternates between $V_0 (000)$ and $V_7 (111)$:

Sector 1 Center-Aligned 7-Segment PWM:
         |<-------------------- Ts -------------------->|
Phase U: ---[   1   ][   1   ][   1   ][   1   ][   1   ]---  (Q1)
Phase V: -------[   1   ][   1   ][   1   ]-------            (Q3)
Phase W: -----------[   1   ]-----------                      (Q5)

Vector:  | V0 |  V1  |  V2  |  V7  |  V2  |  V1  | V0 |
State:   | 000| 100  | 110  | 111  | 110  | 100  | 000|
Time:    |T0/4| T1/2 | T2/2 | T0/2 | T2/2 | T1/2 |T0/4|

This symmetry cancels all even harmonics, keeping total harmonic distortion (THD) exceptionally low.

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5. Overmodulation and Six-Step Operation

When vehicle acceleration demands voltage exceeding the linear circle ($|\vec{V}_{ref}| > V_{dc}/\sqrt{3}$), the modulator enters overmodulation:

1. Linear Range ($M \le 0.907$): Pure circular trajectory within the inscribed circle ($THD < 1\%$).
2. Overmodulation Mode 1 ($0.907 < M \le 0.95$): Vector magnitude is clipped along the straight edges of the hexagon.
3. Overmodulation Mode 2 ($0.95 < M \le 1.0$): Vector dwells longer at hexagon vertices, holding the angle fixed for portions of the cycle.
4. Six-Step Mode ($M = 1.0$): Inverter abandons PWM and steps directly between the 6 active vertices ($V_1 \to V_2 \to \dots \to V_6$).
   • Yields absolute maximum fundamental voltage: $V_{1,max} = \frac{2}{\pi} V_{dc} \approx 0.637 \cdot V_{dc}$
   • Crucial for maximum high-speed highway acceleration where voltage headroom is paramount.

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6. Dead-Time Distortion and Compensation

To prevent shoot-through short circuits when switching complementary transistors in the same bridge leg, a blanking interval called Dead-Time ($t_d \approx 1.0 - 2.5\ \mu s$) is mandatory.

Dead-Time Insertion:
  High Switch: [ ON  ] ---------------------> [ OFF ]
                         |<-- Dead Time -->|
  Low Switch:  -----------------------------> [ ON  ]

Detrimental Effects:

• During dead-time, output phase voltage is dictated by the direction of phase current freewheeling through antiparallel body diodes.
• Injects 5th and 7th harmonic voltage errors, causing low-speed torque ripple and audible motor growl.

Active Compensation:

Automotive motor controllers monitor phase current polarity ($\text{sgn}(i_{phase})$) and dynamically inject a feedforward offset into the PWM compare registers:

$V_{comp} = \text{sgn}(i) \cdot \frac{t_d}{T_s} \cdot V_{dc}$

This digitally eliminates dead-time distortion, restoring smooth low-speed launch torque.

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7. Summary

• SVPWM models inverter outputs as discrete vectors on an $\alpha-\beta$ voltage hexagon.
• Yields a 15.5% increase in usable DC bus voltage compared to classical sinusoidal SPWM.
• Symmetric 7-segment center-aligned modulation cuts switching losses and suppresses even harmonics.
• Overmodulation extends inverter capability up to the full six-step limit ($0.637 V_{dc}$) for peak highway performance.
• Real-time dead-time compensation prevents low-speed torque ripple and acoustic buzz.

Next Lesson

• MOTOR-19 — MTPA and Field Weakening: Resolving the voltage ellipse and current circle intersection, negative Id injection, and deep field weakening up to MTPV limits.